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Design Verification Engineer

What are the top 3 "must have non-negotiable" skill sets that need to be present on a resume? 

  • System Verilog, UVM, Experience with writing testbench and testcases
  • Preferable - DSP/GPU block/top level verification experience, OCP/AMBA protocol experience
  • Processor based block/Subsystem or SoC verification using C/C++

 Are there any specific certifications, educational background or portfolios that you’re looking for?

  • No BE or ME EE/CE/CS would be ok.

 Are you open to candidates who can only work remote? 

  • Ok during COVID19 outbreak but prefer onsite working at FB office with us.

 

RESPONSIBILITIES

  • Write and augment existing testplans.
  • Implement testbench and scoreboards / checkers.
  • Implement test sequences as per plan and debug failures
  • Achieve 100% functional and code coverage
  • Work closely with designers, micro architects & f/w to resolve issues
  • Ability to communicate & articulate clearly progress / issues with project leads

 

 

MINIMUM QUALIFICATIONS

  • 5+ years of proven experience as a DV engineer
  • Hands on experience with SV and UVM
  • Hands on Experience with executable test plans and Coverage Driven verification
  • Hands on Experience with Synopsys VCS / Verdi or Cadence Incisive tools
  • Familiarity with C/C++

 

PREFFERED QUALIFICATIONS

  • Python (or similar) scripting language
  • ASIC design experience
  • Experience in DSP based Audio or Computer Graphics or Compression' is desirable

 

Bachelor's degree

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