View Our Website View All Jobs

Verification Engineer

RESPONSIBILITIES

·         Write and augment existing test plans.

·         Implement testbench and scoreboards / checkers.

·         Implement test sequences as per plan and debug failures

·         Achieve 100% functional and code coverage

·         Work closely with designers, micro architects & f/w to resolve issues

·         Ability to communicate & articulate clearly progress / issues with project leads

 

MINIMUM QUALIFICATIONS

  • 5+ years of proven experience as a DV engineer
  • Hands on experience with SV and UVM
  • Hands on Experience with executable test plans and Coverage Driven verification
  • Hands on Experience with Synopsys VCS / Verdi or Cadence Incisive tools
  • Familiarity with C/C++

 

Read More

Apply for this position

Required*
Apply with Indeed
We've received your resume. Click here to update it.
Attach resume as .pdf, .doc, .docx, .odt, .txt, or .rtf (limit 5MB) or Paste resume

Paste your resume here or Attach resume file

150